*The Wind Top desktop has 24inch 3D 120hz FullHD multitouch monitor! Seems the first!
Jointly with Dell u2711 you have all the things I want from monitors in just two monitors
(well dell only adds 10 bit color, 27inch and 2560x1440 res)!
The Wind Top desktop hasHD (1080p resolution) displays range from 19- to 24-inches. At the top of the list are the Wind Tops AE2420 and AE2280, 22- and 24-inch multi-touch displays respectively, equipped with processors up to Intel Core i7. The 24-inch model features a 120Hz LED display that pairs with 3D shutter glasses. (That 3D trend isn’t dying off so fast.)
Nexus and C#
Yes, you can use Parallel Nsight/Nexus to debug CUDA C kernels written in C# or other CPU languages, but Nsight doesn't directly support the C# project type yet.
So to use CUDA.NET with Nsight, you'll need to create a dummy C++ project whose 'command' in your Nexus User Properties to your C# executable.
Then do Nexus Menu Start CUDA Debugging in Visual Studio, and you should be off and running. AFAIK, you'll still need to program the actual GPU code in CUDA C.
Pages with GPU computing stuff!
see the new? http://developer.nvidia.com/object/gpucomputing.html
you have 3 guides with Fermi stuff!
In the programming guide didn't mention that GF100 is capable of simultaneous transfers of cuMemcpyDtoHAsync and cuMemcpyHtoDAsync. I've added this to my good ol' concurrent bandwidth test and will be updating that in the near future.
search concurrent bandwidth test 1.1 for Fermi!
Missing is CUDA Developer Guide for Optimus Platforms.
__global__ function parameters are passed to the device:
* via shared memory and are limited to 256 bytes on devices of compute
capability 1.x,
* via constant memory and are limited to 4 KB on devices of compute capability
2.0.
others:
http://www.directx11tutorials.com/
[JumpToDX11-11] DirectCompute
http://vsts2010.net/220
http://www.opengpu.org/bbs/archiver/
Ivan Golubev is the blog to follow for Crypto and integer ops on GPUs!
http://www.golubev.com/blog/
He says he has added bitalign AMD IL v2 for MD5 and SHA1 cracking on 5xxx GPUs has a post estimating perf of even Fermi GPUs..
search ighashgpu 0.70 it has this support test md5 and sha1 perf:
ighashgpu.exe /h:96b13dbbc9f3bc569ddad9745f64b9cdb43ea9ae /t:sha1 /c:sd /max:7
ighashgpu.exe /h:cbe1d6d5800ec1e03a5f2a64882a0d41 /t:md5 /c:sd /max:7
In post around end January you can find also SSE code used in her program..
VS CUDA:
You should be able to implement bit rotations using the bit-align instruction introduced with Direct3D 11 and supported on both Fermi and Cypress (computes ((a:b) >> c) & 0xffffffff, where a:b is the concatenation of two 32-bit operands).
This adds nothing to the "NVIDIA vs. AMD" debate, but should provide a nice further improvement compared to the previous generation.
Maybe some other tricks are possible...
For instance both G80 and Fermi support free binary negation of operands to logic instructions (allowing NOR, NAND, NXOR, ANDN...), and Fermi supports a left shift followed by an addition as a single instruction.
Edit: also, there is always the MAD24 instruction for computations such as 5*i+1 (much faster than adds).
Benchmar reveiws has NVIDIA nTeresting: 22 February 2010!
Limitations in OpenCL
1. Can i include C inline assembly code in my openCL code?
2. Does OpenCL support addtion and subtraction with carry?
in AMD also current limitations:
Lacking Pinned mem!
uses one UAV for all allocations so max 256Mbytes usage!
Nvidia has not this two limitations no through DirectCompute!
Regarding the two OCL limitations modify CAL++ author includes in TODO list and second is assembly instruction on 5xxx so when in AMD IL author can add!
Also Nvidia trough CUDA there is a ADDC enabled compiler referenced in previous posts and also
inline assembly is unofficialy supported in CUDA!
In Nvidia OCL you can modify code PTX on the fly and add addc and feed them!
How to wait for kernel finalization without CPU usage (from Golubev blog):
CUDA create context with CU_CTX_BLOCKING_SYNC
CAL Specifically there is an undocumented feature calCtxWaitForEvent
True ATI again planted a dog - GPU kernel compiled Catalyst 9.12 are 10% slower on RV8 × 0. and somewhere in the 2-3 times slower on RV7X0. It happened due to the fact that now the ATI CAL compiler aggressively unroll !absolutely everything, so that the kernel will become the size of a few hundred KB, did not interfere in the cache ... and everything is covered
OpenCL for FreeBASIC: http://shiny3d.de/libs/fbOpenCL.zip
Remember there is also for FreePascal and Delphi!
5 Questions -- Implementing a bunch of OpenCL tools
Texture sharing
I thing you must use in OpenCL d3d interop..
http://msdn.microsoft.com/en-us/library/ee418929%28VS.85%29.aspx
ID3D10Device::OpenSharedResource
To share a resource between a Direct3D 9 device and a Direct3D 10 device the texture must have been created using the pSharedHandle argument of CreateTexture. The shared Direct3D 9 handle is then passed to OpenSharedResource in the hResource argument.
The following code illustrates the method calls involved.
sharedHandle = NULL; // must be set to NULL to create, can use a valid handle here to open in D3D9
pDevice9->CreateTexture(..., pTex2D_9, &sharedHandle);
...
pDevice10->OpenSharedResource(sharedHandle, __uuidof(ID3D10Resource), (void**)(&tempResource10));
tempResource10->QueryInterface(__uuidof(ID3D10Texture2D), (void**)(&pTex2D_10));
tempResource10->Release();
// now use pTex2D_10 with pDevice10
Textures being shared from D3D9 to D3D10 have the following restrictions.
* Textures must be 2D
* Only 1 mip level is allowed
* Texture must have default usage
* Texture must be write only
* MSAA textures are not allowed
* Bind flags must have SHADER_RESOURCE and RENDER_TARGET set
* Only R10G10B10A2_UNORM, R16G16B16A16_FLOAT and R8G8B8A8_UNORM formats are allowed
Interesting post: http://software.intel.com/en-us/articles/copying-accelerated-video-decode-frame-buffers/ vlc 1.1 is using that approach I think and also MPC Home cinema it seems!
vlc 1.1 is doing that!
Final round of Tesla Compute Cluster driver testing:
*CUDA H264 GPU video encoding work through MediaCoder
*vreveal works (clean video, sharpness)
issues:
stabilization: Gray uniform colors
contrast: i get pink color
*Badaboom fails with:
.GPU 0: ATI Radeon HD 5800 Series
FATAL:There is no GPU device supporting CUDA.
(Altough there supports TCC CUDA)
Currently the global memory available is the value returned by CL_DEVICE_GLOBAL_MEM_SIZE in device query. Full physical memory is expected to be available in one of the upcoming releases.
Global buffer is 128bit aligned addresses, UAV's are byte aligned and on 5XXX series of cards you can have up to 9 UAV's per kernel. Also through UAV's you can do byte addressable writes with the UAV arena and also atomic operations. None of these can be done on the global buffer path.
Global buffer is 128bit aligned addresses, UAV's are byte aligned and on 5XXX series of cards you can have up to 9 UAV's per kernel. Also through UAV's you can do byte addressable writes with the UAV arena and also atomic operations. None of these can be done on the global buffer path.
it is easier to burst using global memory as it is an implicit 128 bit write versus an implicit 32bit write on UAV.
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